obren.io / 359°

History of IEEE Micro in 259 Chapters

About

  • This is a curated and experimental site, offering historical and visual index of all collected sources.
  • The site does not host any of the files. It only provides an index and links to full text files.
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Latest Issue

2024
2024, no. 5: Warehouse-Scale Computing

Latest Issue:
Warehouse-Scale Computing

  • Twenty Five Years of Warehouse-Scale Computing
  • Quantifying CO<sub>2</sub> Emission Reduction Through Spatial Partitioning in Deep Learning Recommendation System Workloads
  • Server Architecture From Enterprise to Post-Moore
  • Commercial and Scientific Prototypes
  • Luiz Andr&eacute; Barroso: Brilliant Engineer, Humble Leader, and Mentor
  • ...

History

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2023
2023, no. 5: Security and Privacy

A Year Ago:
Security and Privacy

  • Hardware Security and Privacy: Threats and Opportunities
  • Accelerating Finite Field Arithmetic for Homomorphic Encryption on GPUs
  • XCRYPT: Accelerating Lattice-Based Cryptography With Memristor Crossbar Arrays
  • A Golden-Free Approach to Detect Trojans in COTS Multi-PCB Systems
  • E-Booster: A Field-Programmable Gate Array-Based Accelerator for Secure Tree Boosting Using Additively Homomorphic Encryption
  • ...
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2019
2019, no. 5: Machine Learning Acceleration

5 Years Ago:
Machine Learning Acceleration

  • Analog Neural Networks With Deep-Submicrometer Nonlinear Synapses
  • Machine Learning Accelerators and More
  • Machine Learning Acceleration
  • SSDStreamer: Specializing I/O Stack for Large-Scale Machine Learning
  • A Disaggregated Memory System for Deep Learning
  • ...
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2014
2014, no. 5: High-Speed Datacenter Network Fabrics

10 Years Ago:
High-Speed Datacenter Network Fabrics

  • Twin Datacenter Interconnection Topology
  • Enough Variety and Diversity?
  • Patents and High-Speed Datacenter Interconnects
  • Alice v. CLS Bank: Are US Business-Method and Software Patents Doomed? Part 1
  • Decentralized NIC-Switching Architecture Using SR-IOV PCI Express Network Device
  • ...
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2009
2009, no. 5: Multicore Resource Managament

15 Years Ago:
Multicore Resource Managament

  • Memory Built-in Self Test in Multicore Chips with Mesh-Based Networks
  • Hardware-Software Codesign for High-Speed Signature-based Virus Scanning
  • Micro Economics: Does Google Have Too Much Money?
  • A Benchmark Characterization of the EEMBC Benchmark Suite
  • From the Editor in Chief: Welcome A-Board
  • ...
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2004
2004, no. 5: Network Processors

20 Years Ago:
Network Processors

  • PRO3: A Hybrid NPU Architecture
  • Creative Destruction and Deconstruction
  • NP-Click: A Productive Software Development Approach for Network Processors
  • Vicarious liability for infringement
  • Communication versus Computation
  • ...
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1981
1981, no. 1:

Premiere Issue:

  • Digital Filter Implementation on 16-Bit Microcomputers
  • Microprocessor Bus Structures and Standards
  • A Design Philosophy for Microcomputers
  • A History of Microprocessor Development at Intel
  • Putting Design into an Introductory Logic Design Course
  • ...